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Synfora to Streamline SoC Design With Tighter Integration of Its PICO System and Novas Tools; Leader in Application Engine Synthesis and Leader in Design Debug Systems Collaborate to Improve SoC Design



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MOUNTAIN VIEW, Calif.—(BUSINESS WIRE)—Sept. 27, 2005— To provide its customers with more seamless use of the market's leading debug platform for complex system-on-chip (SoC) designs, Synfora(TM) has joined the Novas Harmony Program. Synfora plans to tightly integrate its PICO software for application engine synthesis (AES) with the Novas Verdi(TM) Automated Debug System and nLint(TM) module.

The ability to automatically generate a complete verification environment -- including RTL testbenches and SystemC transaction-level models -- is an integral part of Synfora's PICO products for AES. As a result of Synfora's collaboration with Novas, this verification framework lets Synfora customers easily and automatically invoke the Novas Verdi debug system and nLint HDL design rule checker with PICO-generated RTL code to debug their designs. They can display their simulation waveforms in the familiar Novas debug environment and cross-probe with the PICO-generated RTL source files, all while using their preferred simulators. This makes it easier to find and fix bugs, thus reducing the overall verification effort.

Vinod Kathail, CTO and vice-president of engineering at Synfora, said, "In our drive to significantly accelerate SoC design and verification for our customers, we will continue to increase the integration of Synfora and Novas products through our membership in the Novas Harmony Program. The next level of integration will make the products appear nearly seamless, from C source code to RTL to waveforms. This will allow a designer to debug a design at any level of abstraction in a familiar environment."

Novas' director of product marketing George Bakewell added, "Today's multi-million gate SoC designs present significant design and verification challenges. Providing greater interoperability between Synfora's PICO products and our industry-standard Novas debug platform means that SoC designers can more easily verify and debug the RTL and SystemC code generated by Synfora's tools. The result is a significant acceleration of the overall development cycle."

About Novas Harmony Program

Novas established the Harmony program in 1999 to lower the cost of EDA tool interoperability. The Harmony program provides developers of verification and other tools with software licenses, engineering support for integration efforts, and ongoing support for mutual customers. Novas' open application programming interfaces (APIs) ensure that the widest range of chip design and verification solutions can take advantage of its industry-leading debug capabilities.

About Synfora

Founded in 2003, Synfora, Inc. of Mountain View, Calif., is the leading provider of application engine synthesis (AES) software used to design complex systems-on-chips (SoCs). Synfora's technology helps to reduce fixed design costs and dramatically speed chip development and time-to-market. Synfora targets companies in the audio, video, imaging, wireless, and security segments of the IC design market. The company's investors are ATA Ventures, Foundation Capital, and U.S. Venture Partners. For the latest news and information on Synfora, visit www.synfora.com.

Synfora and the Synfora logo are trademarks of Synfora, Inc. All other names mentioned are trademarks, registered trademarks, or service marks of their respective companies.



Contact:
Synfora, Inc.
Monica Nascimento, 650-314-0500 ext. 110
Email Contact
or
Armstrong Kendall, Inc.
Abbie Kendall, 503-672-4681
Email Contact

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